It is proposed here to provide a current mirror for ah application with specific requirements. The application requires less than 0.1 percent total harmonic distortion (THD) without the use of conventional feedback techniques, and also requires that the input signal can be within 1 Vgs of the supply voltage. Most MOS current mirrors with low THD requirements are used in conjunction with high gain stages and use standard feedback techniques. The effective distortion of a circuit used in this manner is the distortion of the output current mirror divided by the overall gain of the circuit. Therefore, a 0.1 percent specification THD can normally be achieved with an output current mirror exhibiting 10 percent distortion and an overall circuit gain of 100, using standard feedback design. A new circuit had to be developed to meet the distortion requirements and allow the input voltage to get within a Vgs of supply. Standard feedback techniques could not be used.
There are a number of standard current mirrors that have been used for a variety of applications. These have been found to be unacceptable for a number of reasons. A description of some of these circuits will be presented to show why a new circuit had to be developed, and to help clarify why this specific technique is different from the others. Each of these circuits is shown using P-channel MOS transistors.
One known circuit is a basic current mirror shown in FIG. 1. The circuit is made up of two matched transistors, P1 and P2, where one transistor, P1, has the gate connected to the drain and sets the gate voltage of P2. The first order model of a MOS device in saturation has no dependance on the drain voltage; however, all devices have some finite output impedance. This output impedance causes a modulation in the drain current of P2 as a function of its drain voltage. This finite output impedance limits the THD of the circuit to approximately 1.5 percent with signal swings of 1 Vrms.
A second prior circuit is a Wilson current mirror shown in FIG. 2. The circuit is made up of three matched transistors P3-P5. Transistor P3 is connected between the voltage supply and the signal input terminal so that the signal current is pulled through P3. In a separate path the transistors P4 and P5 are connected in series between the voltage supply and the output terminal so that the output signal current is the current through transistors P4 and P5. The drain of P4 is coupled to the gates of P3 and P4 and the gate of P5 is coupled to the drain of P3. The gate voltage on P3 is set by the feedback from the drain of P3 across the Vgs of P5. The gate voltage of P3 is also the gate to drain voltage of P4, thus the currents of P3 and P4 are matched. The output current is taken from the drain of P5 which has the same current as in P3 and P4. Large variations in the drain voltage of P5 have very small effects on the current set by P3 and P4; therefore, the output impedance of this stage is far greater than the basic P-channel mirror of FIG. 1. The amount of output impedance improvement of this circuit over the previous one described is equal to the inverse of the transconductance of P3 times the output impedance of P3. This can be an improvement of approximately 50 times with reasonable device sizes. The distortion of this circuit is approximately the THD of the basic current mirror of FIG. 1 divided by 50 (due to the improvement in output impedance). The Wilson mirror exhibits the required output impedance to achieve the 0.1 percent THD, but the input voltage can only get to within 2 Vgs of supply. This is unacceptable for this application.
The third prior art circuit is a folded cascode current mirror shown in FIG. 3. The circuit is made up of three matched transistors P7-P9, and one 2X transistor P6. That is, P7-P9 have the same transistor geometry and particularly the same width to length ratio W/L, while P6 has a ratio 2W/L so that for the same applied voltages twice the current will flow. A reference current is established through P7 and P9 and set equal to the DC component of the input current. Twice this DC current is present in P6. The signal current is applied to the source of P8 and the drain of P6. The AC current in the signal modulates the current across P8 (it is assumed that the maximum AC current is no greater than the DC current). The output of this stage is the drain of P8. It has an output impedance similar to the Wilson current mirror with approximately 50X improvement over the basic current source. This circuit exhibits the desired output impedance and the input voltage can get to within a Vgs-Vt of supply. The problem with this circuit is the input impedance of the circuit is approximately equal to the inverse of the transconductance of P8. The variation in the source voltage of P8 modulates the drain voltage of P6. This creates error current as a function of the signal current, which is a source o distortion. This circuit, due to the high input impedance, has only an improvement in THD of 10 over the basic current mirror. This is not enough to satisfy the required specification.